Assessment of ESD threats to electronic components and ESD control requirements

We propose new methods for the assessment of real electrostatic discharge (ESD) threats to electronic components in modern electronics manufacturing environment, where the devices are more sensitive to ESD than ever. The work was based on two fundamental questions: what are the key parameters of ESD that must be controlled in order to minimise risk of damage, and what are the threshold levels of these parameters, below which ESD risk is low? As a result of the study, proposals are given for two new ways of assessing risk: by measurement of peak ESD current, and charge induced on test objects. We suggest how guideline limits for ESD damage thresholds based on these tests may be derived.